Arm server-grade cores have coherent icaches because… — Lobsters: Newest Comments

Arm server-grade cores have coherent icaches because explicit flushes are pretty expensive especially when with the system-wide broadcast needed combined with huge core counts.
However, on Arm's server cores, opting into the coherent icache comes at the price of having the L1i be strictly included within the L2. Arm does not offer that option on client-oriented cores.
Apple's design has a non-coherent L1i but Qualcomm's Oryon cores even on phones ship with a coherent L1i.
https://lobste.rs/c/tpsfo0